SIMPAC-T - a simulator for multitransputer systems
DSpace at IIT Bombay
View Archive InfoField | Value | |
Title |
SIMPAC-T - a simulator for multitransputer systems
|
|
Creator |
ARUNKUMAR, S
LAL, R VENKATAGOPAL, R |
|
Description |
Performance evaluation of parallel algorithms and architectures has several advantages. We present an event driven simulator for performance evaluation and modelling of multitransputer systems. The system topology and architectural details are input to the simulator. The application program is mapped by the user on to the system using the higher level primitives of the simulation language provided. The simulator produces performance metrics of resource (processor, communication link) utilization besides process sojourns in various states. A trace file containing the log of the system snapshots is output which can be used for various analyses by the user and the system designer.
|
|
Publisher |
ELSEVIER SCIENCE BV
|
|
Date |
2011-10-22T06:30:15Z
2011-12-15T09:10:47Z 2011-10-22T06:30:15Z 2011-12-15T09:10:47Z 1992 |
|
Type |
Article; Proceedings Paper
|
|
Identifier |
MICROPROCESSING AND MICROPROGRAMMING,35,253-260
0165-6074 http://dx.doi.org/10.1016/0165-6074(92)90324-Z http://dspace.library.iitb.ac.in/xmlui/handle/10054/14831 http://hdl.handle.net/100/1662 |
|
Source |
18TH SYMP ON MICROPROCESSING AND MICROPROGRAMMING ( EUROMICRO-92 ) : SOFTWARE AND HARDWARE : SPECIFICATION AND DESIGN,PARIS, FRANCE,SEP 24-17, 1992
|
|
Language |
English
|
|