Analog device and circuit performance degradation under substrate bias enhanced hot carrier stress
DSpace at IIT Bombay
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Title |
Analog device and circuit performance degradation under substrate bias enhanced hot carrier stress
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Creator |
NARASIMHULU, K
RAO, VR |
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Subject |
submicron cmos technology
design analog performance degradation substrate enhanced hci forward body biasing (fbb) scheme auger recombination v(t) mismatch |
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Description |
In this paper, we investigate the influence of forward and reverse body bias stress on the hot carrier induced degradation of MOS analog performance parameters. The underlying physical mechanisms are identified with the help of experimental results, TCAD and Monte-Carlo simulations. We show that under for-ward body bias stress conditions, the auger recombination enhanced hot carrier injection (HCI) degrades the device and circuit performance considerably. Degradation in various analog circuits' performance is quantified by considering the individual transistors under different stress conditions.
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Publisher |
IEEE
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Date |
2011-10-25T02:06:14Z
2011-12-15T09:11:20Z 2011-10-25T02:06:14Z 2011-12-15T09:11:20Z 2006 |
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Type |
Proceedings Paper
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Identifier |
2006 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS - 44TH ANNUAL,465-470
0-7803-9498-4 http://dx.doi.org/10.1109/RELPHY.2006.251263 http://dspace.library.iitb.ac.in/xmlui/handle/10054/15575 http://hdl.handle.net/100/2007 |
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Source |
44th Annual IEEE International Reliability Physics Symposium,San Jose, CA,MAR 26-30, 2006
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Language |
English
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