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Exploiting hybrid analysis in solving electrical networks

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Title Exploiting hybrid analysis in solving electrical networks
 
Creator SANKAR, VS
NARAYANAN, H
PATKAR, SB
 
Description In this paper we use topological hybrid analysis (mixture of nodal analysis and loop analysis) to solve circuits with resistors, voltage sources, current sources and diodes with exponential characteristics. In topological hybrid analysis [3], from the given network two smaller circuits are derived and solved simultaneously satisfying certain boundary conditions and this results in a solution of the original network. Our main emphasis is on non planar circuits with a large conductance range. The reason for this is that for non planar circuits preconditioned Conjugate Gradient method seems to perforin very well but its convergence will be adversely affected once the ratio of maximum to minimum. conductance becomes as high as 10(8). To overcome this problem we use Hybrid analysis and a variation of Conjugate Gradient method. Using this method we analyzed circuits containing resistors with large range of values, voltage sources and current sources and having size up to I million nodes and 3 million edges on 3GHZ pentium IV processor with 2GB RAM in less than 4 minutes. Also, we report the simulation timings for circuits containing diodes.
 
Publisher IEEE COMPUTER SOC
 
Date 2011-10-25T04:43:27Z
2011-12-15T09:11:27Z
2011-10-25T04:43:27Z
2011-12-15T09:11:27Z
2009
 
Type Proceedings Paper
 
Identifier 22ND INTERNATIONAL CONFERENCE ON VLSI DESIGN HELD JOINTLY WITH 8TH INTERNATIONAL CONFERENCE ON EMBEDDED SYSTEMS, PROCEEDINGS,206-211
978-0-7695-3506-7
1063-9667
http://dx.doi.org/10.1109/VLSI.Design.2009.27
http://dspace.library.iitb.ac.in/xmlui/handle/10054/15605
http://hdl.handle.net/100/2074
 
Source 22nd International Conference on VLSI Design held with 8th International Conference on Embedded Systems,New Delhi, INDIA,JAN 05-09, 2009
 
Language English