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23.97GHz CMOS distributed voltage controlled oscillators with inverter gain cells and frequency tuning by Body bias and MOS Varactors concurrently

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Title 23.97GHz CMOS distributed voltage controlled oscillators with inverter gain cells and frequency tuning by Body bias and MOS Varactors concurrently
 
Creator BHATTACHARYYA, K
 
Description Tunable VCOs operating around 24GHz in 0 18 mu m CMOS are reported Simple CMOS inverters are used as gain stages and tuning is achieved with a novel method using both body-bias as well as MOS varactors concurrently and compared for performances The novel tuning method allows for a wider tuning range than using a single method Here forward body bias (FBB) type tuning of p-FETs has 9-10 times higher tuning bandwidth as compared to MOS varactors tuning when the latter is connected in series (before output collection point) but equal or nearly equal tuning when the Varactor pair is connected in parallel (to drain transmission line) Six monolithically integrated novel distributed voltage controlled oscillators (D-VCOs) with a novel gain cell comprising of CMOS inverter are designed Top Layer metal is used for coplanar waveguide (CPW) for on-chip inductors First D-VCO OSC-1 has 3-stages of the gain cell and oscillating at 23 97GHz, the second D-VCO OSC-2 has 4-stages of gain cell and oscillating at 18 64GHz, both K-band oscillators use body bias variation of p-FETs for wide frequency tuning For further tuning after body bias type of tuning, MOS Varactors are added in series to OSC-1 and OSC-2 resulting in designs respectively OSC-3 and OSC-4, while in parallel resulting in designs respectively OSC-3a and OSC-4a OSC-3 is oscillating at 23 53GHz and OSC-4 is oscillating at 18 09GHz OSC-3a is oscillating at 22 79GHz with 340MHz tuning by each of these two tuning techniques (doubling of tuning bandwidth as total tuning is 680MHz) OSC-4a is oscillating at 17 77GHz (resulting Ku-band VCO from K-band for substantial design reuse) with 240MHz tuning by FBB and 200MHz tuning by Varactor pair (total tuning of 440MHz) The phase noise is reported at 1MHz offset from the carrier, for example it is -102 4dBc/Hz for 18 64GHz D-VCO These oscillators are emitting very low power in 2nd and 3rd harmonics
 
Publisher IEEE COMPUTER SOC
 
Date 2011-10-25T04:45:21Z
2011-12-15T09:11:27Z
2011-10-25T04:45:21Z
2011-12-15T09:11:27Z
2010
 
Type Proceedings Paper
 
Identifier 23RD INTERNATIONAL CONFERENCE ON VLSI DESIGN,182-187
978-1-4244-5541-6
http://dx.doi.org/10.1109/VLSI.Design.2010.42
http://dspace.library.iitb.ac.in/xmlui/handle/10054/15606
http://hdl.handle.net/100/2075
 
Source 23rd International Conference on VLSI Design/9th International Conference on Embedded Systems,Bangalore, INDIA,JAN 03-07, 2010
 
Language English