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Applicability of dual layer metal nanocrystal flash memory for NAND 2 or 3-bit/cell operation : understanding the anomalous breakdown and optimization of P/E conditions

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Title Applicability of dual layer metal nanocrystal flash memory for NAND 2 or 3-bit/cell operation : understanding the anomalous breakdown and optimization of P/E conditions
 
Creator SINGH, P
SANDHYA, C
AULUCK, K
BISHT, G
SIVATHEJA, M
HOFMANN, R
MUKHOPADHYAY, G
MAHAPATRA, S
SINGH, PK
BISHT, KAG
SIVATHEJA, M
MUKHOPADHYAY, G
MAHAPATRA, S
HOFMANN, R
 
Subject nonvolatile
reliability
performance
al2o3
sonos
nc
component
metal nanocrystal
flash memory
mlc
reliability
 
Description Large memory window (6-9V) program/erase (P/E) cycling endurance is studied for evaluating their suitability for MLC operation. Effect of NC area coverage and device size is evaluated using statistical method. Constant voltage stress (CVS) measurements and 2-D simulations are extensively used to evaluate the impact of carrier; type, fluence, and energy on the defect generation process in the gate stack. Degradation during P and E are isolated to allow individual optimization for improving the cycling reliability. P/E cycling endurance >10(4) at 8V MW and >2.5x10(3) at 9V MW are shown for first time in metal NC memory devices using the proposed distributed cycling scheme.
 
Publisher IEEE
 
Date 2011-10-24T22:51:56Z
2011-12-15T09:11:49Z
2011-10-24T22:51:56Z
2011-12-15T09:11:49Z
2010
 
Type Proceedings Paper
 
Identifier 2010 INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM,981-987
978-1-4244-5431-0
http://dx.doi.org/10.1109/IRPS.2010.5488690
http://dspace.library.iitb.ac.in/xmlui/handle/10054/15535
http://hdl.handle.net/100/2308
 
Source International Reliability Physics Symposium,Monterey, CA,APR 10-14, 2011
 
Language English