Automated design and optimization of circuits in emerging technologies
DSpace at IIT Bombay
View Archive InfoField | Value | |
Title |
Automated design and optimization of circuits in emerging technologies
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Creator |
THAKKER, RA
SATHE, C SACHID, AB BAGHINI, MS RAO, VR PATIL, MB |
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Subject |
simulation
cmos |
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Description |
A novel table-based environment for automatic design and optimization of FinFET circuits is demonstrated. A new accurate look-up table (LUT) technique is implemented in a circuit simulator and integrated with particle swarm optimization algorithm for efficient circuit designs in novel devices. Op-amp circuits are designed and optimized to demonstrate the accuracy and usefulness of the proposed platform. Further, it is shown that the proposed design methodology can take into account variations in process, supply voltage, and temperature.
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Publisher |
IEEE
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Date |
2011-10-25T14:56:11Z
2011-12-15T09:11:59Z 2011-10-25T14:56:11Z 2011-12-15T09:11:59Z 2009 |
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Type |
Proceedings Paper
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Identifier |
PROCEEDINGS OF THE ASP-DAC 2009: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2009,504-509
978-1-4244-2748-2 http://dspace.library.iitb.ac.in/xmlui/handle/10054/15750 http://hdl.handle.net/100/2408 |
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Source |
14th Asia and South Pacific Design Automation Conference,Yokohama, JAPAN,JAN 19-22, 2009
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Language |
English
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