DC & transient circuit simulation methodologies for organic electronics
DSpace at IIT Bombay
View Archive InfoField | Value | |
Title |
DC & transient circuit simulation methodologies for organic electronics
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Creator |
NAVAN, RR
THAKKER, RA TIWARI, SP BAGHINI, MS PATIL, MB MHAISALKAR, SG RAO, VR |
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Subject |
thin-film transistors
look-up table (lut) organic thin film transistor (otft) particle swarm optimization (pso) sequel |
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Description |
This work establishes a novel circuit simulation methodology for organic thin film transistors (OTFTs). Because of a lack of well developed physical models for OTFTs and due to the limitations of conventional parameter extraction techniques, the approaches presented in this work come in handy for circuit designers. The first approach uses a Look-up Table (LUT) model, which is implemented in a general purpose public-domain circuit simulator SEQUEL (Solver for circuit EQuations with User-defined Elements). In the second approach, circuit simulation is performed using equivalent SPICE parameters, which are extracted using a global optimization technique namely particle swarm optimization (PSO) algorithm. A good match has been observed between LUT simulations and SPICE based circuit simulations for both DC and transient cases.
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Publisher |
IEEE
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Date |
2011-10-25T20:58:41Z
2011-12-15T09:12:08Z 2011-10-25T20:58:41Z 2011-12-15T09:12:08Z 2009 |
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Type |
Proceedings Paper
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Identifier |
2009 2ND INTERNATIONAL WORKSHOP ON ELECTRON DEVICES AND SEMICONDUCTOR TECHNOLOGY,118-121
978-1-4244-3831-0 http://dspace.library.iitb.ac.in/xmlui/handle/10054/15819 http://hdl.handle.net/100/2487 |
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Source |
2nd International Workshop on Electron Devices and Semiconductor Technology,Bombay, INDIA,JUN 01-02, 2009
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Language |
English
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