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Drain current model for undoped symmetric double-gate FETs using a velocity saturation model with exponent n=2
DSpace at IIT Bombay
View Archive Info| Field | Value | |
| Title |
Drain current model for undoped symmetric double-gate FETs using a velocity saturation model with exponent n=2
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| Creator |
HARIHARAN, V
VASI, J RAO, VR |
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| Subject |
dg mosfet
compact model |
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| Publisher |
IEEE
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| Date |
2011-10-26T07:56:54Z
2011-12-15T09:12:09Z 2011-10-26T07:56:54Z 2011-12-15T09:12:09Z 2007 |
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| Type |
Proceedings Paper
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| Identifier |
2007 INTERNATIONAL SEMICONDUCTOR DEVICE RESEARCH SYMPOSIUM, VOLS 1 AND 2,138-139
978-1-4244-1891-6 http://dspace.library.iitb.ac.in/xmlui/handle/10054/15949 http://hdl.handle.net/100/2499 |
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| Source |
International Semiconductor Device Research Symposium,College Pk, MD,DEC 12-14, 2007
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| Language |
English
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