The effect of band gap engineering of the nitride storage node on performance and reliability of charge trap flash
DSpace at IIT Bombay
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Title |
The effect of band gap engineering of the nitride storage node on performance and reliability of charge trap flash
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Creator |
SANDHYA, C
GANGULY, U SINGH, KK OLSEN, C SEUTTER, SM CONTI, G AHMED, K KRISHNA, N VASI, J MAHAPATRA, S |
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Subject |
oxynitride
memory devices layer |
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Description |
The effect of nitride composition, i.e. Si-rich (Si+) and N-rich (N+) nitride bi-layers separated by an oxynitride (SiON) layer on memory performance and reliability is studied. Bottom Si+ layer and top N+ forms the Si+/N+ bi-layer that is compared to the opposite configuration of N+/Si+ bi-layer to reveal large impact on memory performance and reliability. Si+/N+ bi-layers exhibit superior P/E windows and endurance characteristics but worse retention charge loss compared to N+/Si+ stacks. The oxynitride layer composition and position play a dominant role in trap generation as evident from endurance performance. A low energy-threshold degradation mechanism with higher degradation of the SiON layer with greater H-content is observed. A Si-H bond breaking mechanism is proposed as trap generation mechanism during endurance cycling. Retention is primarily bottom nitride composition dependent as tunnel oxide is shown to be the dominant charge loss path.
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Publisher |
IEEE
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Date |
2011-10-25T22:12:07Z
2011-12-15T09:12:09Z 2011-10-25T22:12:07Z 2011-12-15T09:12:09Z 2008 |
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Type |
Proceedings Paper
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Identifier |
IPFA 2008: PROCEEDINGS OF THE 15TH INTERNATIONAL SYMPOSIUM ON THE PHYSICAL & FAILURE ANALYSIS OF INTEGRATED CIRCUITS,224-230
978-1-4244-2039-1 http://dspace.library.iitb.ac.in/xmlui/handle/10054/15831 http://hdl.handle.net/100/2501 |
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Source |
15th International Symposium on the Physical and Failure Analysis of Integrated Circuits,Singapore, SINGAPORE,JUL 07-11, 2008
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Language |
English
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