Record Details

Performance analysis of CMOS mode locked class E power amplifier

DSpace at IIT Bombay

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Field Value
 
Title Performance analysis of CMOS mode locked class E power amplifier
 
Creator ARORA, P
MUKHERJEE, J
AGARWAL, V
 
Subject class e
cmos
power amplifier
state space
 
Description The design of Class E Amplifiers is more difficult than other type of amplifiers as it is imposed by time domain constraints. This paper presents the performance analysis of Mode Locked class E Power Amplifiers using State Space Analysis Algorithm. A technique is introduced which is used to curb the negative effect of parasitic resistance of DC Feed Choke and the Power Amplifier operates at 2.4GHz and simulated with a 0.18 mu m CMOS process at a supply voltage of 2V.
 
Publisher IEEE
 
Date 2011-10-28T00:01:29Z
2011-12-15T09:12:50Z
2011-10-28T00:01:29Z
2011-12-15T09:12:50Z
2010
 
Type Proceedings Paper
 
Identifier 53RD IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS,905-908
978-1-4244-7773-9
1548-3746
http://dspace.library.iitb.ac.in/xmlui/handle/10054/16455
http://hdl.handle.net/100/2931
 
Source 53rd Midwest Symposium on Circuits and Systems (MWSCAS 2010),Seattle, WA,AUG 01-04, 2010
 
Language English