Fast loop matrix generation for hybrid analysis and a comparison of the sparsity of the loop impedance and MNA impedance submatrices
DSpace at IIT Bombay
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Title |
Fast loop matrix generation for hybrid analysis and a comparison of the sparsity of the loop impedance and MNA impedance submatrices
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Creator |
OVALEKAR, VRINDA S
NARAYANAN, H |
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Subject |
circuit analysis computing
graph theory iterative methods matrix algebra |
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Description |
The authors report on a new method developed for loop matrix generation which is essentially an extension of the mesh matrix generation method, to handle nonplanar graphs. This method, based on J. Tarjan and R. Hopcroft's (1974) planarity testing algorithm, was found to yield sparse loop impedance matrices. For graphs with nonplanarity of 10%, the density of the resulting loop impedance matrix was less than 1%. For most networks with nonplanarities of about 2%, the number of nonzero entries was found to be less than that for the modified nodal analysis (MNA) matrix. In these cases loop analysis is expected to perform better than MNA for iterative methods of linear equation solution, both the number of iterations and the time taken for each iteration of the linear equation solution being less than that for MNA,
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Publisher |
IEEE
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Date |
2008-12-18T04:49:37Z
2011-11-27T18:02:31Z 2011-12-15T09:56:09Z 2008-12-18T04:49:37Z 2011-11-27T18:02:31Z 2011-12-15T09:56:09Z 1992 |
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Type |
Article
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Identifier |
Proceedings of the IEEE International Symposium on Circuits and Systems (V 4), San Diego, USA, 3-6 May 1992, 1780-1783.
0-7803-0593-0 10.1109/ISCAS.1992.230409 http://hdl.handle.net/10054/390 http://dspace.library.iitb.ac.in/xmlui/handle/10054/390 |
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Language |
en
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