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A novel QRDCL circuit for zero voltage switched inverter

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Field Value
 
Title A novel QRDCL circuit for zero voltage switched inverter
 
Creator BAGEWADI, MD
FERNANDES, BG
SUBRAHMANYAM, RVS
 
Subject pwm invertors
spice
circuit simulation
resonant power convertors
 
Description This paper presents an alternate quasi-resonant dc link (QRDCL) circuit for soft switched inverters which does not require paralleling of a charged capacitor with another charged capacitor or a voltage source. The circuit momentarily pulls down the DC link voltage to zero as commanded by the control circuit to facilitate zero voltage switching (ZVS) of inverter devices. Operation of this circuit is independent of load current. The circuit is snubberless and offers true PWM capability. The paper covers description of the circuit, operating principles, detailed analysis of various modes and design considerations. Feasibility and operating principles of the circuit have been verified by simulation using PSPICE.
 
Publisher IEEE
 
Date 2008-12-22T05:46:29Z
2011-11-28T03:06:39Z
2011-12-15T09:56:15Z
2008-12-22T05:46:29Z
2011-11-28T03:06:39Z
2011-12-15T09:56:15Z
1999
 
Type Article
 
Identifier Proceedings of the 1999 IEEE International Symposium on Circuits and Systems (V 6), Orlando, USA, 30 May-2 June 1999, 109-112.
0-7803-5471-0
10.1109/ISCAS.1999.780107
http://hdl.handle.net/10054/451
http://dspace.library.iitb.ac.in/xmlui/handle/10054/451
 
Language en