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Single-event-induced barrier lowering in deep-submicron MOS devices and circuits

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Title Single-event-induced barrier lowering in deep-submicron MOS devices and circuits
 
Creator JAIN, PALKESH
VASI, J
LAL, RAKESH
 
Subject computer simulation
electric fields
semiconductor junctions
integrated circuits
 
Description In this paper, we report a novel reliability issue, coined single-event-induced barrier lowering (SEBL), which deals with barrier lowering along the channel and the source-substrate junction during a single event high energy particle strike on MOS devices. We have comprehensively studied SEBL for different channel lengths and our results suggest that it can cause significant charge enhancement, and therefore can bring down the critical energy to low values. Thus SEBL can be a strong deterrent to further reduction of the stored charge on a node and can have serious scaling implications.
 
Publisher IEEE
 
Date 2008-12-09T06:27:09Z
2011-11-28T03:26:55Z
2011-12-15T09:56:16Z
2008-12-09T06:27:09Z
2011-11-28T03:26:55Z
2011-12-15T09:56:16Z
2004
 
Type Article
 
Identifier Proceedings of the 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits, Taiwan, China, 5-8 July 2004, 287-290
0-7803-8454-7
http://hdl.handle.net/10054/241
http://dspace.library.iitb.ac.in/xmlui/handle/10054/241
 
Language en