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A new approach to the problem of PLA partitioning using the theory of the principal lattice of partitions of a submodular function

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Title A new approach to the problem of PLA partitioning using the theory of the principal lattice of partitions of a submodular function
 
Creator ROY, SUBIR
NARAYANAN, H
 
Subject vlsi
combinatorial circuit
graph theory
logic arrays
logic design
 
Description An area efficient 2 level implementation of combinational logic can be achieved by partitioning the original PLA into several PLAs each of which interacts with the others weakly. A PLA implementing a sum of products logic functions can be modelled through a bipartite graph B G, which specifies the intersection of rows (minterms) with columns of the AND plane (primary inputs) and the OR plane (primary outputs) respectively. The authors show how to achieve a good PLA partition by using the principal lattice of partitions of the incidence function of BG
 
Publisher IEEE
 
Date 2008-12-18T04:49:52Z
2011-11-27T18:18:08Z
2011-12-15T09:56:34Z
2008-12-18T04:49:52Z
2011-11-27T18:18:08Z
2011-12-15T09:56:34Z
1991
 
Type Article
 
Identifier Proceedings of the Fourth Annual IEEE International ASIC Conference and Exhibit, Rochester, New York, 23-27 September 1991, York, P2 - 4.1-P2 - 4.4.
0-7803-0101-3
10.1109/ASIC.1991.242957
http://hdl.handle.net/10054/391
http://dspace.library.iitb.ac.in/xmlui/handle/10054/391
 
Language en