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Comprehensive simulation of program, erase and retention in charge tapping flash memories

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Field Value
 
Title Comprehensive simulation of program, erase and retention in charge tapping flash memories
 
Creator PAUL, A
CHSRIDHAR
GEDAM, S
MAHAPATRA, S
 
Subject flash memories
logic simulation
optimisation
 
Description A simulator is developed for SONOS flash memories to predict program (P), erase (E) and retention (R) behavior under uniform ID operation. It provides insight on the impact of trap parameters on P, E and R and can be used to optimize memory stacks.
 
Publisher IEEE
 
Date 2009-01-05T13:00:47Z
2011-11-28T07:04:27Z
2011-12-15T09:56:42Z
2009-01-05T13:00:47Z
2011-11-28T07:04:27Z
2011-12-15T09:56:42Z
2006
 
Type Article
 
Identifier Proceedings of the International Electron Devices Meeting, San Francisco, USA, 11-13 December 2006, 1-4
1-4244-0439-8
10.1109/IEDM.2006.346793
http://hdl.handle.net/10054/548
http://dspace.library.iitb.ac.in/xmlui/handle/10054/548
 
Language en