Distributed PC based routers: bottleneck analysis and architecture proposal
DSpace at IIT Bombay
View Archive InfoField | Value | |
Title |
Distributed PC based routers: bottleneck analysis and architecture proposal
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Creator |
KHAN, AJ
BIRKE, R MANJUNATH, D SAHOO, ANIRUDHA BIANCO, A |
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Subject |
routers
computer networks electric network topology general purpose computers |
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Description |
Recent research in the different functional areas of modern routers have made proposals that can greatly increase the efficiency of these machines. Most of these proposals can be implemented quickly and often efficiently in software. We wish to use personal computers as forwarders in a network to utilize the advances made by researchers. We therefore examine the ability of a personal computer to act as a router. We analyze the performance of a single general purpose computer and show that I/O is the primary bottleneck. We then study the performance of distributed router composed of multiple general purpose computers. We study the performance of a star topology and through experimental results we show that although its performance is good, it lacks flexibility in its design. We compare it with a multistage architecture. We conclude with a proposal for an architecture that provides us with a forwarder that is both flexible and scalable.
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Publisher |
IEEE
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Date |
2009-01-12T11:57:18Z
2011-11-28T07:04:57Z 2011-12-15T09:56:51Z 2009-01-12T11:57:18Z 2011-11-28T07:04:57Z 2011-12-15T09:56:51Z 2008 |
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Type |
Article
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Identifier |
Proceedings of the International Conference on High Performance Switching and Routing, Shanghai, China, 15-17 May 2008, 57-62
978-1-4244-1982-1 10.1109/HSPR.2008.4734421 http://hdl.handle.net/10054/554 http://dspace.library.iitb.ac.in/xmlui/handle/10054/554 |
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Language |
en
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