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Channel engineering for high speed sub-1.0 V power supply deep sub-micron CMOS

DSpace at IIT Bombay

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Title Channel engineering for high speed sub-1.0 V power supply deep sub-micron CMOS
 
Creator CHENG, BAOHONG
INANI, ANAND
RAMGOPAL RAO, V
WOO, JCS
 
Subject switching circuits
mosfet devices
semiconductor device
electric power systems
 
Description The effects of channel engineering on device performance have been extensively investigated. The lateral asymmetric channel (LAC) MOSFETs show significantly higher Idsat and gmsat, lower I off, and superior short-channel performance compared with double-halo (DH) and conventional MOSFETs by effectively utilizing the velocity overshoot effects. It is demonstrated that the device switching speed of the LAC device at VDD=0.6 V is equivalent to that of a conventional device operated at VDD=1.5 V
 
Publisher IEEE
 
Date 2009-01-22T05:56:14Z
2011-11-28T07:11:58Z
2011-12-15T09:56:52Z
2009-01-22T05:56:14Z
2011-11-28T07:11:58Z
2011-12-15T09:56:52Z
1999
 
Type Article
 
Identifier Proceedings of the Symposium on VLSI Technology Digest of Technical Papers, Kyoto, Japan, 14-16 June 1999, 69-70
4-930813-93-X
10.1109/VLSIT.1999.799344
http://hdl.handle.net/10054/574
http://dspace.library.iitb.ac.in/xmlui/handle/10054/574
 
Language en