Record Details

A comprehensive trapped charge profiling technique for SONOS flash EEPROMs

DSpace at IIT Bombay

View Archive Info
 
 
Field Value
 
Title A comprehensive trapped charge profiling technique for SONOS flash EEPROMs
 
Creator NAIR, PR
BHARATH KUMAR, P
SHARMA, RAVINDER
MAHAPATRA, S
KAMOHARA, S
 
Subject monte carlo methods
computer simulation
flash memory
threshold voltage
 
Description Trapped charge profiles under CHE program of SONOS flash cells are uniquely determined and verified using I-V, GIDL and CP measurements and Monte Carlo simulations. The prospect of profiling using I-V measurement alone is discussed. The inaccuracy associated with conventional CP technique is discussed. The correct method of CP simulation for programmed SONOS devices is shown and programming induced interface-trap generation is estimated.
 
Publisher IEEE
 
Date 2008-12-12T04:44:26Z
2011-11-28T07:52:36Z
2011-12-15T09:57:16Z
2008-12-12T04:44:26Z
2011-11-28T07:52:36Z
2011-12-15T09:57:16Z
2004
 
Type Article
 
Identifier Proceedings of the IEEE International Electron Devices Meeting Technical Digest, Tokyo, Japan, 13-15 December 2004, 403-406
0-7803-8684-1
10.1109/IEDM.2004.1419170
http://hdl.handle.net/10054/301
http://dspace.library.iitb.ac.in/xmlui/handle/10054/301
 
Language en