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Efficient DC analysis of RVJ circuits for moment and derivative computations of interconnect networks

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Title Efficient DC analysis of RVJ circuits for moment and derivative computations of interconnect networks
 
Creator BATTERYWALA, SH
NARAYANAN, H
 
Subject constant current sources
graph theory
integrated circuit interconnections
integrated circuit modelling
method of moments
network topology
 
Description In this article we present a method for analysis of electrical networks containing positive resistors, voltage sources and current sources. We lay emphasis on computational aspects like size and positive definiteness of the resulting matrix. Currently the most popular method for analysis of such circuits is modified nodal analysis, which always yields a nonpositive definite matrix whenever voltage sources are present in the circuit. Our method constructs two minors of the underlying graph of the network and then uses these for writing KCE and KVE, thereby resulting in a symmetric positive definite system of equations of smaller size. We exploit the presence of voltage sources, and hence usually get a block diagonal structure in the matrix to be factored. Though our method is general enough and performs better than MNA for all DC circuits, it is specifically aimed towards solving DC circuits encountered during interconnect analysis.
 
Publisher IEEE
 
Date 2008-12-18T04:48:22Z
2011-11-27T14:45:41Z
2011-12-15T09:58:05Z
2008-12-18T04:48:22Z
2011-11-27T14:45:41Z
2011-12-15T09:58:05Z
1999
 
Type Article
 
Identifier Proceedings of the 12th International Conference On VLSI Design, Goa, India, 7-10 January 1999, 169-174.
0-7695-0013-7
10.1109/ICVD.1999.745144
http://hdl.handle.net/10054/383
http://dspace.library.iitb.ac.in/xmlui/handle/10054/383
 
Language en