Record Details

Effect of fringing capacitances in sub 100 nm MOSFETs with high-K gate dielectrics

DSpace at IIT Bombay

View Archive Info
 
 
Field Value
 
Title Effect of fringing capacitances in sub 100 nm MOSFETs with high-K gate dielectrics
 
Creator MOHAPATRA, NR
DUTTA, A
DESAI, MP
RAMGOPAL RAO, V
 
Subject cmos integrated circuit
dielectric materials
monte carlo methods
leakage currents
 
Description In this paper we look at the quantitative picture of fringing field effects by use of high-k dielectrics on the 70 nm node CMOS technologies. By using Monte-Carlo based techniques, we extract the degradation in gate-to-channel capacitance and the internal and external fringing capacitance components for varying values of K. The results clearly show the decrease in external fringing capacitance, increase in internal fringing capacitance and a slight decrease in overall capacitance, when the conventional SiO2 is replaced by high-K dielectric. From the circuit point of view the lower total capacitance will increase the speed of the device, while the internal fringing capacitance will degrade the short-channel performance contributing to higher DIBL and drain leakage.
 
Publisher IEEE
 
Date 2008-12-12T04:47:32Z
2011-11-28T09:25:09Z
2011-12-15T09:58:13Z
2008-12-12T04:47:32Z
2011-11-28T09:25:09Z
2011-12-15T09:58:13Z
2001
 
Type Article
 
Identifier Proceedings of the Fourteenth International Conference on VLSI Design, Banglore, India, 3-7 January 2001, 479-482
0-7695-0831-6
10.1109/ICVD.2001.902704
http://hdl.handle.net/10054/309
http://dspace.library.iitb.ac.in/xmlui/handle/10054/309
 
Language en