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A novel technique for optimising the harmonics and reactive power under nonsinusoidal voltage conditions

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Title A novel technique for optimising the harmonics and reactive power under nonsinusoidal voltage conditions
 
Creator GEORGE, SINCY
AGARWAL, VIVEK
 
Subject newton-raphson method
active filters
electric impedance
harmonic distortion
power factor correction
power harmonic filters
 
Description The conventional power factor correction techniques assume the voltage source to be purely sinusoidal. But this is rarely true because the nonsinusoidal currents drawn by nonlinear loads incur nonsinusoidal voltage drops across source impedance and transmission line impedance. The result is a nonsinusoidal voltage supply applied to the load. Under such conditions, any attempt to make the power factor unity by usual methods will result in a nonsinusoidal current, which increases total harmonic distortion (THD). On the other hand attempt for harmonic free current may not result in unity power factor because of harmonics present in the voltage. Thus, there is a trade off between improvement in power factor and reduction of THD. With the law enforcing agencies getting more vigilant about power quality, it has become unavoidable to optimise power factor while satisfying harmonics limits. In this paper, a novel technique for optimisation of harmonics and power factor subject to power quality constraints is presented for nonsinusoidal voltage conditions. The technique is based on Lagrange multiplier method and calculates the concerned control coefficients by Newton Raphson method. This is used to compute the desired source current for optimum power factor satisfying the power demand of the load while meeting the THD limits. Knowing the load current, the compensating current that must be supplied by the active filter to the power system can be calculated. The proposed scheme does not use the widely used p-q theory and is applicable for both the single-phase and three-phase systems. Analysis using MATLAB has shown encouraging results. The scheme is being implemented in hardware using DSP.
 
Publisher IEEE
 
Date 2008-12-17T08:03:51Z
2011-11-27T16:52:37Z
2011-12-15T09:58:27Z
2008-12-17T08:03:51Z
2011-11-27T16:52:37Z
2011-12-15T09:58:27Z
2002
 
Type Article
 
Identifier Proceedings of the 28th Annual Conference of the IEEE Industrial Electronics Society (V 2), Spain, 5-8 November 2002, 858-863
0-7803-7474-6
http://hdl.handle.net/10054/372
http://dspace.library.iitb.ac.in/xmlui/handle/10054/372
 
Language en