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Application of look-up table approach to high-K gate dielectric MOS transistor circuits

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Title Application of look-up table approach to high-K gate dielectric MOS transistor circuits
 
Creator VINAY KUMAR, D
MOHAPATRA, NR
PATIL, MB
RAMGOPAL RAO, V
 
Subject mosfet circuits
circuit simulation
semiconductor device models
table lookup
 
Description In this paper, we study the circuit performance issues of high-K gate dielectric MOSFETs using the Look-up Table (LUT) approach. The LUT approach is implemented in a public-domain circuit simulator SEQUEL. We observed an excellent match between LUT simulator and mixed mode simulations using MEDICI. This work clearly demonstrates the predictive power of the new simulator, as it enables evaluation of circuits directly from device simulation results without going through model parameter extraction.
 
Publisher IEEE
 
Date 2008-12-20T05:50:07Z
2011-11-28T02:28:26Z
2011-12-15T09:58:38Z
2008-12-20T05:50:07Z
2011-11-28T02:28:26Z
2011-12-15T09:58:38Z
2003
 
Type Article
 
Identifier Proceedings of the 16th International Conference on VLSI Design, New Delhi, India, 4-8 January 2003, 128-133
0-7695-1868-0
10.1109/ICVD.2003.1183126
http://hdl.handle.net/10054/427
http://dspace.library.iitb.ac.in/xmlui/handle/10054/427
 
Language en