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Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors

DSpace at IIT Bombay

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Title Electret mechanism, hysteresis, and ambient performance of sol-gel silica gate dielectrics in pentacene field-effect transistors
 
Creator CAHYADI, T
TAN, HS
MHAISALKAR, SG
LEE, PS
BOEY, F
CHEN, ZK
NG, CM
RAO, VR
QI, GJ
 
Subject thin-film transistors
electronics
insulators
transport
devices
resins
 
Description The electret induced hysteresis was studied in sol-gel silica films that result in higher drain currents and improved device performance in pentacene field-effect transistors. Vacuum and ambient condition studies of the hysteresis behavior and capacitance-voltage characteristics on single layer and varying thicknesses of bilayer dielectrics confirmed that blocking layers of thermal oxide could effectively eliminate the electret induced hysteresis, and that thin (25 nm) sol-gel silica dielectrics enabled elimination of nanopores thus realizing stable device characteristics under ambient conditions. (c) 2007
 
Publisher AMER INST PHYSICS
 
Date 2011-07-15T16:39:48Z
2011-12-26T12:49:35Z
2011-12-27T05:34:50Z
2011-07-15T16:39:48Z
2011-12-26T12:49:35Z
2011-12-27T05:34:50Z
2007
 
Type Article
 
Identifier APPLIED PHYSICS LETTERS, 91(24), -
0003-6951
http://dx.doi.org/10.1063/1.2821377
http://dspace.library.iitb.ac.in/xmlui/handle/10054/4327
http://hdl.handle.net/10054/4327
 
Language en