Record Details

Development of an abstract model for a non-volatile static random access memory

DSpace at IIT Bombay

View Archive Info
 
 
Field Value
 
Title Development of an abstract model for a non-volatile static random access memory
 
Creator THARAKAN, KTO
CHANDORKAR, AN
RAO, SSSP
 
Subject memory devices
non-volatile static random access memory (nvsram)
memory fault modelling algorithm
random access memory
models
fault models
non-volatile memory
static random access memory (sram)
 
Description The capability to protect against power fluctuations, which eventually prevents the corruption of the memory contents makes non-volatile static random access memory a very good choice for use in highly reliability applications. These random access memories are protected against data writing in addition to preserving the desired contents. Energy source and control circuitries are embedded into it for achieving the same. The control circuitry constantly monitors supply voltage level, inhibits data corruption, and switches on the energy Source once it falls beyond a threshold level. In this paper, development of an abstract model for such a non-volatile static random access memory chip has been presented. Test sequences based on this model have been generated for this memory chip. These test sequences have been implemented in VLSI tester and exercised on the chips.
 
Publisher DEFENCE SCIENTIFIC INFORMATION DOCUMENTATION CENTRE
 
Date 2011-07-21T08:22:39Z
2011-12-26T12:51:58Z
2011-12-27T05:38:49Z
2011-07-21T08:22:39Z
2011-12-26T12:51:58Z
2011-12-27T05:38:49Z
2004
 
Type Article
 
Identifier DEFENCE SCIENCE JOURNAL, 54(2), 183-188
0011-748X
http://dspace.library.iitb.ac.in/xmlui/handle/10054/5846
http://hdl.handle.net/10054/5846
 
Language en