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Study of P/E Cycling Endurance Induced Degradation in SANOS Memories Under NAND (FN/FN) Operation

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Title Study of P/E Cycling Endurance Induced Degradation in SANOS Memories Under NAND (FN/FN) Operation
 
Creator SANDHYA, C
OAK, AB
CHATTAR, N
GANGULY, U
OLSEN, C
SEUTTER, SM
DATE, L
HUNG, R
VASI, J
MAHAPATRA, S
 
Subject oxide-semiconductor structures
flash memories
reliability
performance
model
sin
charge trap flash (ctf)
endurance
erase
impact ionization
memory window
program
retention
sanos
silicon nitride (sin)
sonos
 
Description Program/Erase (P/E) cycling endurance in poly-Si/Al(2)O(3)/SiN/SiO(2)/Si (SANOS) memories is systematically studied. Cycling-induced trap generation, memory window (MW) closure, and eventual stack breakdown are shown to be strongly influenced by the material composition of the silicon nitride (SiN) charge trap layer. P/E pulsewidth and amplitude, as well as starting program and erase flatband voltage (V(FB)) levels (therefore the overall MW), are shown to uniquely impact stack degradation and breakdown. An electron-flux-driven anode hole generation model is proposed, and trap generation in both SiN and tunnel oxide are used to explain stack degradation and breakdown. This paper emphasizes the importance of SiN layer optimization for reliably sustaining large MW during P/E operation of SANOS memories.
 
Publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
 
Date 2011-08-01T17:08:25Z
2011-12-26T12:53:26Z
2011-12-27T05:39:00Z
2011-08-01T17:08:25Z
2011-12-26T12:53:26Z
2011-12-27T05:39:00Z
2010
 
Type Article
 
Identifier IEEE TRANSACTIONS ON ELECTRON DEVICES, 57(7), 1548-1558
0018-9383
http://dx.doi.org/10.1109/TED.2010.2048404
http://dspace.library.iitb.ac.in/xmlui/handle/10054/8493
http://hdl.handle.net/10054/8493
 
Language en