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A Common Framework of NBTI Generation and Recovery in Plasma-Nitrided SiON p-MOSFETs

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Title A Common Framework of NBTI Generation and Recovery in Plasma-Nitrided SiON p-MOSFETs
 
Creator DEORA, S
MAHETA, VD
ISLAM, AE
ALAM, MA
MAHAPATRA, S
 
Subject bias temperature instability
i-dlin technique
interface-trap
nitrogen
stress
generation
hole trapping
interface trap generation
negative bias temperature instability (nbti)
p-mosfet
recovery
 
Description Generation and recovery of degradation during and after negative bias temperature instability (NBTI) stress are studied in a wide variety of plasma-nitrided (PN) silicon oxynitride (SiON) p-MOSFETs. An ultrafast on-the-fly linear drain current (I(DLIN)) technique, which is capable of measuring the shift in threshold voltage from very short (approximately in microseconds) to long (approximately in hours) stress/recovery time, is used. The mechanics of NBTI generation and recovery are shown to be strongly correlated and can be consistently explained using the framework of an uncorrelated sum of a fast and weakly temperature (T)-dependent trapped-hole (Delta V(h)) component and a relatively slow and strongly T-activated interface trap (Delta V(IT)) component. The SiON process dependences are attributed to the difference in the relative contributions of Delta V(h) and Delta V(IT) to the overall degradation (Delta V(T)), as dictated by the nitrogen (N) content and thickness of the gate insulator.
 
Publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
 
Date 2011-07-31T15:49:38Z
2011-12-26T12:53:04Z
2011-12-27T05:40:10Z
2011-07-31T15:49:38Z
2011-12-26T12:53:04Z
2011-12-27T05:40:10Z
2009
 
Type Article
 
Identifier IEEE ELECTRON DEVICE LETTERS, 30(9), 978-980
0741-3106
http://dx.doi.org/10.1109/LED.2009.2026436
http://dspace.library.iitb.ac.in/xmlui/handle/10054/8161
http://hdl.handle.net/10054/8161
 
Language en