A Novel Bottom Spacer FinFET Structure for Improved Short-Channel, Power-Delay, and Thermal Performance
DSpace at IIT Bombay
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Title |
A Novel Bottom Spacer FinFET Structure for Improved Short-Channel, Power-Delay, and Thermal Performance
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Creator |
SHRIVASTAVA, M
BAGHINI, MS SHARMA, DK RAO, VR |
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Subject |
bulk finfets
gate design bulk fin-shaped field-effect transistor (finfet) electrothermal fin-shaped field-effect transistor (finfet) self-heating short-channel performance spacer width quantization |
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Description |
For the first time, we propose a novel bottom spacer fin-shaped field-effect-transistor (FinFET) structure for logic applications suitable for system-on-chip (SoC) requirements. The proposed device achieved improved short-channel, power-delay, and self-heating performance compared with standard silicon-on-insulator FinFETs. Process aspects of the proposed device are also discussed in this paper. Physical insight into the improvement toward the short-channel performance and power dissipation is given through a detailed 3-D device/mixed-mode simulation. The self-heating behavior of the proposed device is compared with standard FinFETs by using detailed electro-thermal simulations. The proposed device requires an extra process step but enables smaller electrical width for self-loaded circuits and is an excellent option for SoC applications.
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Publisher |
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
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Date |
2011-07-31T18:11:34Z
2011-12-26T12:53:05Z 2011-12-27T05:40:14Z 2011-07-31T18:11:34Z 2011-12-26T12:53:05Z 2011-12-27T05:40:14Z 2010 |
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Type |
Article
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Identifier |
IEEE TRANSACTIONS ON ELECTRON DEVICES, 57(6), 1287-1294
0018-9383 http://dx.doi.org/10.1109/TED.2010.2045686 http://dspace.library.iitb.ac.in/xmlui/handle/10054/8193 http://hdl.handle.net/10054/8193 |
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Language |
en
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