Record Details

A Novel Gate-Assisted Reverse-Read Scheme to Control Bit Coupling and Read Disturb for Multibit/Cell Operation in Deeply Scaled Split-Gate SONOS Flash EEPROM Cells

DSpace at IIT Bombay

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Title A Novel Gate-Assisted Reverse-Read Scheme to Control Bit Coupling and Read Disturb for Multibit/Cell Operation in Deeply Scaled Split-Gate SONOS Flash EEPROM Cells
 
Creator DATTA, A
ASNANI, R
MAHAPATRA, S
 
Subject device
bit coupling
eeprom
gate sensing
non-volatile semiconductor memory
read disturb
scaling
silicon-oxide-nitride-oxide-silicon (sonos)
split gate
stack gate
2-bit operation
 
Description A dual-node split-gate silicon-oxide-nitride-oxide silicon cell with a novel read scheme is proposed for 2-bit/cell operation. Using suitable gate screening bias in reverse read, bit coupling can be reduced, even when low read V(D) is used to keep read disturb under control. The proposed read scheme maintains the memory window for dual-bit/cell operation for deeply scaled cells. Two-dimensional process, device, and Monte Carlo simulations are extensively used to design and understand cell operation.
 
Publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
 
Date 2011-07-31T18:15:47Z
2011-12-26T12:53:05Z
2011-12-27T05:40:14Z
2011-07-31T18:15:47Z
2011-12-26T12:53:05Z
2011-12-27T05:40:14Z
2009
 
Type Article
 
Identifier IEEE ELECTRON DEVICE LETTERS, 30(8), 885-887
0741-3106
http://dx.doi.org/10.1109/LED.2009.2025060
http://dspace.library.iitb.ac.in/xmlui/handle/10054/8194
http://hdl.handle.net/10054/8194
 
Language en