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CONDITIONALLY ROBUST 2-PATTERN TESTS AND CMOS DESIGN FOR TESTABILITY

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Field Value
 
Title CONDITIONALLY ROBUST 2-PATTERN TESTS AND CMOS DESIGN FOR TESTABILITY
 
Creator SHERLEKAR, SD
SUBRAMANIAN, PS
 
Publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
 
Date 2011-07-31T23:09:26Z
2011-12-26T12:53:11Z
2011-12-27T05:40:23Z
2011-07-31T23:09:26Z
2011-12-26T12:53:11Z
2011-12-27T05:40:23Z
1988
 
Type Article
 
Identifier IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 7(3), 325-332
0278-0070
http://dx.doi.org/10.1109/43.3165
http://dspace.library.iitb.ac.in/xmlui/handle/10054/8267
http://hdl.handle.net/10054/8267
 
Language en