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Effect of Loop Configuration on Steam Drum Level Control for a Multiple Drum Interconnected Loops Pressure Tube Type Boiling Water Reactor

DSpace at IIT Bombay

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Title Effect of Loop Configuration on Steam Drum Level Control for a Multiple Drum Interconnected Loops Pressure Tube Type Boiling Water Reactor
 
Creator GAIKWAD, AJ
VIJAYAN, PK
IYER, K
BHARTIYA, S
KUMAR, R
LELE, HG
GHOSH, AK
KUSHWAHA, HS
SINHA, RK
 
Subject model-predictive control
phase natural circulation
control-system
dynamic simulation
4-tank system
boiler model
power-plant
design
transient
performance
bwr
innovative three-element steam drum level control
modeling simulation control of nuclear power plants
plant transient and safety analysis
relap5
thermal hydraulics
 
Description For AHWR (Advanced Heavy Water Reactor), a pressure tube type Boiling Water Reactor (BWR) with parallel inter-connected loops, the Steam Drum (SD) level control is closely related to Main Heat Transport (MHT) coolant inventory and sustained heat removal through natural circulation, hence overall safety of the power plant. The MHT configuration with multiple (four) interconnected loops influences the SD level control in a manner which has not been previously addressed. The MHT configuration has been chosen based on comprehensive overall design requirements and certain Postulated Initiated Event (PIEs) for Loss of Coolant Accident (LOCA), which postulates a double ended break in the four partitioned Emergency Core Cooling System (ECCS) header. A conventional individual three-element SD level controller can not account for the highly coupled and interacting behaviors, of the four SD levels. An innovative three-element SD level control scheme is proposed to overcome this situation. The response obtained for a variety of unsymmetrical disturbances shows that the SD levels do not diverge and quickly settle to the various new set points assigned. The proposed scheme also leads to enhanced safety margins for most of the PIEs considered with a little influence on the 100% full power steady-state design conditions.
 
Publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
 
Date 2011-08-01T01:51:00Z
2011-12-26T12:53:13Z
2011-12-27T05:40:27Z
2011-08-01T01:51:00Z
2011-12-26T12:53:13Z
2011-12-27T05:40:27Z
2009
 
Type Article
 
Identifier IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 56(6), 3712-3725
0018-9499
http://dx.doi.org/10.1109/TNS.2009.2033682
http://dspace.library.iitb.ac.in/xmlui/handle/10054/8309
http://hdl.handle.net/10054/8309
 
Language en