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Understanding and Optimization of Hot-Carrier Reliability in Germanium-on-Silicon pMOSFETs

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Title Understanding and Optimization of Hot-Carrier Reliability in Germanium-on-Silicon pMOSFETs
 
Creator MAJI, D
CRUPI, F
AMAT, E
SIMOEN, E
DE JAEGER, B
BRUNCO, DP
MANOJ, CR
RAO, VR
MAGNONE, P
GIUSI, G
PACE, C
PANTISANO, L
MITARD, J
RODRIGUEZ, R
NAFRIA, M
 
Subject ge pmosfets
passivation
performance
thickness
junctions
germanium
high-k
hot carrier (hc)
impact ionization
negative bias temperature instability (nbti)
pmosfet
 
Description In this paper, a comprehensive study of hot-carrier injection (HCI) has been performed on high-performance Si-passivated pMOSFETs with high-k metal gate fabricated on n-type germanium-on-silicon (Ge-on-Si) substrates. Negative bias temperature instability (NBTI) has also been explored on the same devices. The following are found: 1) Impact ionization rate in Ge-on-Si MOSFETs is approximately two orders higher as compared to their Si counterpart; 2) NBTI degradation is a lesser concern than HCI for Ge-on-Si pMOSFETs; and 3) increasing the Si-passivation thickness from four to eight monolayers provides a remarkable lifetime improvement.
 
Publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
 
Date 2011-11-07T16:15:01Z
2011-12-26T13:01:21Z
2011-12-27T05:44:45Z
2011-11-07T16:15:01Z
2011-12-26T13:01:21Z
2011-12-27T05:44:45Z
2009
 
Type Article
 
Identifier IEEE TRANSACTIONS ON ELECTRON DEVICES, 56(5), 1063-1069
0018-9383
http://dx.doi.org/10.1109/TED.2009.2015854
http://dspace.library.iitb.ac.in/xmlui/handle/10054/16585
http://hdl.handle.net/10054/16585
 
Language en