Record Details

POWER REDUCTION METHODS FOR NMOS DYNAMIC RANDOM-ACCESS MEMORIES

DSpace at IIT Bombay

View Archive Info
 
 
Field Value
 
Title POWER REDUCTION METHODS FOR NMOS DYNAMIC RANDOM-ACCESS MEMORIES
 
Creator NAIDU, RV
MAHAPATRA, S
 
Publisher PERGAMON-ELSEVIER SCIENCE LTD
 
Date 2011-08-25T23:29:45Z
2011-12-26T12:57:16Z
2011-12-27T05:47:17Z
2011-08-25T23:29:45Z
2011-12-26T12:57:16Z
2011-12-27T05:47:17Z
1988
 
Type Article
 
Identifier MICROELECTRONICS AND RELIABILITY, 28(6), 877-883
0026-2714
http://dx.doi.org/10.1016/0026-2714(88)90286-7
http://dspace.library.iitb.ac.in/xmlui/handle/10054/11184
http://hdl.handle.net/10054/11184
 
Language en