Record Details

Optimization and realization of sub-100-nm channel length single halo p-MOSFETs

DSpace at IIT Bombay

View Archive Info
 
 
Field Value
 
Title Optimization and realization of sub-100-nm channel length single halo p-MOSFETs
 
Creator RAMGOPAL RAO, V
BORSE, DG
MANJULA RANI, KN
JHA, NEERAJ K
CHANDORKAR, AN
VASI, J
CHENG, B
WOO, JCS
 
Subject mosfet
hot carriers
ion implantation
semiconductor device reliability
semiconductor doping
 
Description Single halo p-MOSFETs with channel lengths down to 100 nm are optimized, fabricated, and characterized as part of this study. We show extensive device characterization results to study the effect of large angle VT adjust implant parameters on device performance and hot carrier reliability. Results on both conventionally doped and single halo p-MOSFETs have been presented for comparison purposes.
 
Publisher IEEE
 
Date 2008-11-25T12:05:48Z
2011-11-25T15:58:45Z
2011-12-26T13:05:27Z
2011-12-27T05:52:25Z
2008-11-25T12:05:48Z
2011-11-25T15:58:45Z
2011-12-26T13:05:27Z
2011-12-27T05:52:25Z
2002
 
Type Article
 
Identifier IEEE Transactions on Electron Devices 49(6), 1077-79
0018-9383
http://dx.doi.org/10.1109/TED.2002.1003752
http://hdl.handle.net/10054/148
http://dspace.library.iitb.ac.in/xmlui/handle/10054/148
 
Language en_US