Charge injection using gate-induced-drain-leakage current for characterization of plasma edge damage in CMOS devices
DSpace at IIT Bombay
View Archive InfoField | Value | |
Title |
Charge injection using gate-induced-drain-leakage current for characterization of plasma edge damage in CMOS devices
|
|
Creator |
BROZEK, T
RAMGOPAL RAO, V SRIDHARAN, A WERKING, JD CHAN, YD VISWANATHAN, CR |
|
Subject |
cmos integrated circuit
electric charge integrated circuit measurement integrated circuit reliability |
|
Description |
In this paper, we describe the application of gate-induced-drain-leakage (GIDL) current for the characterization of gate edge damage which occurs during the plasma etch processes. We show from experimental and simulation results that when the channel is biased in accumulation and with the drain-substrate junction reverse biased, charge injection is localized in the gate-drain overlap region. Under this localized charge injection (LCI) mode of operation, the gate voltage is a function of edge oxide thickness which in turn can be related to the plasma damage received during the poly-etch and subsequent spacer oxide formation. The detailed mechanism of localized charge injection for a study of plasma edge damage is explained along with the experimental demonstration of this technique using submicron MOSFET's.
|
|
Publisher |
IEEE
|
|
Date |
2009-01-29T12:08:21Z
2011-11-25T16:32:20Z 2011-12-26T13:05:29Z 2011-12-27T05:52:33Z 2009-01-29T12:08:21Z 2011-11-25T16:32:20Z 2011-12-26T13:05:29Z 2011-12-27T05:52:33Z 1998 |
|
Type |
Article
|
|
Identifier |
IEEE Transactions on Semiconductor Manufacturing 11 (2), 211-216
0894-6507 http://dx.doi.org/10.1109/66.670162 http://hdl.handle.net/10054/587 http://dspace.library.iitb.ac.in/xmlui/handle/10054/587 |
|
Language |
en
|
|