Record Details

Device-Circuit Co-design for Beyond 1 GHz 5 V Level Shifter Using DeMOS Transistors

DSpace at IIT Bombay

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Field Value
 
Title Device-Circuit Co-design for Beyond 1 GHz 5 V Level Shifter Using DeMOS Transistors
 
Creator SWAIN, PS
SHRIVASTAVA, M
GOSSNER, H
BAGHINI, MS
 
Subject Device-circuit co-design
level shifter (LS)
overlap region
shallow trench isolation drain extended MOS (STI-DeMOS)
VOLTAGE
CMOS
DRIVER
 
Description This paper presents a device-circuit co-design approach to achieve a low swing, high speed 1.2-5 V level shifter (LS) using drain extended MOS (DeMOS) transistors for system on chip applications in advance CMOS technologies. Limiting factors of the high-voltage devices during transients are identified and accordingly it is shown that the maximum operating frequency of traditional LS can be increased by at least a factor of two. It is demonstrated that optimization of key device parameters of the DeMOS transistor enhances the maximum clock frequency to more than 1 GHz while preserving the device breakdown voltage and duty cycle of the level shifted signal.
 
Publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
 
Date 2014-10-14T17:14:25Z
2014-10-14T17:14:25Z
2013
 
Type Article
 
Identifier IEEE TRANSACTIONS ON ELECTRON DEVICES, 60(11)3827-3834
0018-9383
1557-9646
http://dx.doi.org/10.1109/TED.2013.2283421
http://dspace.library.iitb.ac.in/jspui/handle/100/14541
 
Language en