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Physical Insight Toward Heat Transport and an Improved Electrothermal Modeling Framework for FinFET Architectures

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Title Physical Insight Toward Heat Transport and an Improved Electrothermal Modeling Framework for FinFET Architectures
 
Creator SHRIVASTAVA, M
AGRAWAL, M
MAHAJAN, S
GOSSNER, H
SCHULZ, T
SHARMA, DK
RAO, VR
 
Subject BEOL reliability
electrothermal modeling
ESD
extremely thin silicon on insulator (SOI) (ETSOI)
fin-shaped field-effect transistor (FET) (FinFET)
thermal fail
BULK FINFETS
MOSFETS
DEVICES
 
Description We report on the thermal failure of fin-shaped field-effect transistor (FinFET) devices under the normal operating condition. Pre- and postfailure characteristics are investigated. A detailed physical insight on the lattice heating and heat flux in a 3-D front end of the line and complex back end of line-of a logic circuit network-is given for bulk/silicon-on-insulator (SOI) FinFET and extremely thin SOI devices using 3-D TCAD. Moreover, the self-heating behavior of both the planar and nonplanar devices is compared. Even bulk FinFET shows critical self-heating. Layout, device, and technology design guidelines (based on complex 3-D TCAD) are given for a robust on-chip thermal management. Finally, an improved framework is proposed for an accurate electrothermal modeling of various FinFET device architectures by taking into account all major heat flux paths.
 
Publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
 
Date 2014-10-15T08:21:09Z
2014-10-15T08:21:09Z
2012
 
Type Article
 
Identifier IEEE TRANSACTIONS ON ELECTRON DEVICES, 59(5)1353-1363
http://dx.doi.org/10.1109/TED.2012.2188296
http://dspace.library.iitb.ac.in/jspui/handle/100/14669
 
Language en