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Role of tunneling layer in graphene-oxide based organic nonvolatile memory transistors

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Title Role of tunneling layer in graphene-oxide based organic nonvolatile memory transistors
 
Creator PARK, Y
GUPTA, D
LEE, C
HONG, Y
 
Subject Graphene oxide
Pentacene
Non-volatile memory
Organic thin film transistor
FIELD-EFFECT TRANSISTORS
GATE
DIELECTRICS
 
Description This paper demonstrates non-volatile memory transistor using solution processable graphene oxide (GO) as charge storage nodes in the configuration, p(++)Si/SiO2/GO/Tunneling layer/Pentacene/Au. The tunneling layers are polymethylmethacrylate (PMMA) and polyvinylphenol (PVP). GO film could be deposited as single layered flakes with a uniform distribution using spin coating technique. The devices with PMMA as charge tunneling layer exhibited higher mobility and on/off ratio than PVP based devices. The devices show a large positive threshold voltage shift (similar to 24 V for PMMA and similar to 15 V for PVP) from initial value during programming at gate voltage of +80 V kept for 10 s. The transfer curves can be restored approximately to its initial condition by applying an erasing voltage of -30 V for 10 s for both the devices. Since such a large shift is not observed without GO layer, we consider that memory effect was due to electron trapping in GO. Further, retention of the initial memory window was measured to be 63% and 37% after 3000 s for PMMA and PVP based devices, respectively. (C) 2012 Elsevier B.V. All rights reserved.
 
Publisher ELSEVIER SCIENCE BV
 
Date 2014-10-15T13:26:43Z
2014-10-15T13:26:43Z
2012
 
Type Article
 
Identifier ORGANIC ELECTRONICS, 13(12)2887-2892
http://dx.doi.org/10.1016/j.orgel.2012.08.020
http://dspace.library.iitb.ac.in/jspui/handle/100/15001
 
Language en