Understanding Process Impact of Hole Traps and NBTI in HKMG p-MOSFETs Using Measurements and Atomistic Simulations
DSpace at IIT Bombay
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Title |
Understanding Process Impact of Hole Traps and NBTI in HKMG p-MOSFETs Using Measurements and Atomistic Simulations
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Creator |
MAHAPATRA, S
DE, S JOSHI, K MUKHOPADHYAY, S PANDEY, RK MURALI, KVRM |
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Subject |
Angle-resolved X-ray photoelectron spectroscopy (ARXPS)
Chem-Ox IL DCIV DFT simulations flicker noise high-k metal gate (HKMG) hole traps Negative bias temperature instability (NBTI) thermal Interlayer (IL) trap generation V-T shift SION |
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Description |
The impact of the gate insulator process on interlayer (IL) hole traps in IL/high-K dual-layer p-MOSFET gate-stack is studied by physical and electrical measurements along with atomistic simulations. Processes that lead to higher concentrations of Hf and N in IL, measured by angle-resolved X-ray photoelectron spectroscopy, result in higher IL hole traps measured by flicker noise in prestress and verified by atomistic simulations. The influence of these process induced preexisting IL hole traps on parametric degradation of p-MOSFETs during Negative bias temperature instability (NBTI) stress is studied. The mechanism responsible for superior NBTI of thermal IL stack, having lower Hf and N content in the IL as compared with Chem-Ox IL stack, is explained.
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Publisher |
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
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Date |
2014-10-15T17:06:45Z
2014-10-15T17:06:45Z 2013 |
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Type |
Article
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Identifier |
IEEE ELECTRON DEVICE LETTERS, 34(8)963-965
http://dx.doi.org/10.1109/LED.2013.2270003 http://dspace.library.iitb.ac.in/jspui/handle/100/15286 |
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Language |
en
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