Record Details

Investigation of the Subthreshold Swing in Vertical Tunnel-FETs Using H-2 and D-2 Anneals

DSpace at IIT Bombay

View Archive Info
 
 
Field Value
 
Title Investigation of the Subthreshold Swing in Vertical Tunnel-FETs Using H-2 and D-2 Anneals
 
Creator VANDOOREN, A
WALKE, AM
VERHULST, AS
ROOYACKERS, R
COLLAERT, N
THEAN, AVY
 
Subject Gate-controlled leakage
heterojunction
interface traps
trap-assisted tunneling (TAT)
tunnel FET (TFET)
ACTIVATION-ENERGY ANALYSIS
INTERFACE TRAPS
LEAKAGE CURRENT
MOSFETS
SILICON
TRANSISTORS
INSULATOR
JUNCTIONS
FIELD
MODEL
 
Description This paper analyzes both experimentally and by simulation the impact of traps on the transfer characteristics of tunnel-FETs (TFETs). The interface trap density in vertical heterojunction TFETs is varied by annealing in hydrogen or deuterium ambient. We show that a high-interface trap density (similar to 2 x 10(12)/cm(2)) results in a peak current in the device transfer characteristic at low-gate bias due to surface generation of carriers. The passivation of interface traps to state-of-the-art densities near 1-2 x 10(11)/cm(2) reduces this peak, but improves only marginally the overall subthreshold swing, indicating that the trap-assisted tunneling responsible for the swing degradation is mainly occurring through bulk traps in these devices.
 
Publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
 
Date 2014-12-28T14:13:18Z
2014-12-28T14:13:18Z
2014
 
Type Article
 
Identifier IEEE TRANSACTIONS ON ELECTRON DEVICES, 61(2)359-364
0018-9383
1557-9646
http://dx.doi.org/10.1109/TED.2013.2294535
http://dspace.library.iitb.ac.in/jspui/handle/100/16723
 
Language English