A Detailed Study of Gate Insulator Process Dependence of NBTI Using a Compact Model
DSpace at IIT Bombay
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Title |
A Detailed Study of Gate Insulator Process Dependence of NBTI Using a Compact Model
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Creator |
JOSHI, K
MUKHOPADHYAY, S GOEL, N NANWARE, N MAHAPATRA, S |
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Subject |
Charge pumping (CP)
DCIV flicker noise high-k metal gate (HKMG) negative bias temperature instability (NBTI) modeling silicon oxynitride (SiON) trap generation trapping V-T shift BIAS TEMPERATURE INSTABILITY INTERFACE-TRAP GENERATION I-DLIN TECHNIQUE SION P-MOSFETS PHYSICAL-MECHANISM DEGRADATION NITROGEN |
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Description |
Process impact of negative bias temperature instability (NBTI) is studied in silicon oxynitride (SiON) and high-k metal gate (HKMG) p-MOSFETs. An analytical compact model is used to predict long time degradation. NBTI is shown to be governed by the generation of interface and bulk oxide traps and hole trapping in preexisting traps that are mutually uncorrelated. Experimental evidences are provided to independently verify underlying components. Model parameters are extracted; only a few process-dependent parameters are needed to predict the experimental data from wide range of SiON and HKMG p-MOSFETs at various stress bias and temperature. Similarity between SiON and HKMG devices is highlighted.
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Publisher |
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
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Date |
2014-12-28T14:13:48Z
2014-12-28T14:13:48Z 2014 |
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Type |
Article
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Identifier |
IEEE TRANSACTIONS ON ELECTRON DEVICES, 61(2)408-415
0018-9383 1557-9646 http://dx.doi.org/10.1109/TED.2013.2295844 http://dspace.library.iitb.ac.in/jspui/handle/100/16724 |
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Language |
English
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