Metal-Gate Granularity-Induced Threshold Voltage Variability and Mismatch in Si Gate-All-Around Nanowire n-MOSFETs
DSpace at IIT Bombay
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Title |
Metal-Gate Granularity-Induced Threshold Voltage Variability and Mismatch in Si Gate-All-Around Nanowire n-MOSFETs
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Creator |
NAYAK, K
AGARWAL, S BAJAJ, M OLDIGES, PJ MURALI, KVRM RAO, VR |
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Subject |
Gate-all-around (GAA)
metal-gate granularity (MGG) mismatch silicon nanowire FET threshold voltage variability work function (WF) WORK FUNCTION TRANSISTORS PERFORMANCE |
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Description |
The metal-gate granularity-induced threshold voltage (V-T) variability and V-T mismatch in Si gate-all-around (GAA) nanowire n-MOSFETs (n-NWFETs) are studied using coupled 3-D statistical device simulations considering quantum corrected room temperature drift-diffusion transport. The impact of metal-gate crystal grain size on linear and saturation mode V-T variability are analyzed. The V-T mismatch study predicts lower mismatch figure of merit (A(VT)) in TiN-gated Si GAA n-NWFETs compared with the reported experimental mismatch data for TiN-gated Si FinFETs.
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Publisher |
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
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Date |
2014-12-28T14:15:48Z
2014-12-28T14:15:48Z 2014 |
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Type |
Article
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Identifier |
IEEE TRANSACTIONS ON ELECTRON DEVICES, 61(11)3892-3895
0018-9383 1557-9646 http://dx.doi.org/10.1109/TED.2014.2351401 http://dspace.library.iitb.ac.in/jspui/handle/100/16728 |
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Language |
English
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