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Design and performance study of phase-locked loop using fractional-order loop filter

DSpace at IIT Bombay

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Title Design and performance study of phase-locked loop using fractional-order loop filter
 
Creator TRIPATHY, MC
MONDAL, D
BISWAS, K
SEN, S
 
Subject ELEMENT
DOMAIN
fractional-order PLL (FPLL)
fractional-order loop filter (FLF)
fractional-order voltage controlled oscillator (FVCO)
constant phase angle
capture range
lock range
fractional capacitor
 
Description The present work reports the realization of an analog fractional-order phase-locked loop (FPLL) using a fractional capacitor. The expressions for bandwidth, capture range, and lock range of the FPLL have been derived analytically and then compared with the experimental observations using LM565 IC. It has been observed that bandwidth and capture range can be extended by using FPLL. It has also been found that FPLL can provide faster response and lower phase error at the time of switching compared to its integer-order counterpart. Copyright (c) 2014 John Wiley & Sons, Ltd.
 
Publisher WILEY-BLACKWELL
 
Date 2016-01-14T10:34:14Z
2016-01-14T10:34:14Z
2015
 
Type Article
 
Identifier INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 43(6)776-792
0098-9886
1097-007X
http://dx.doi.org/10.1002/cta.1972
http://dspace.library.iitb.ac.in/jspui/handle/100/17371
 
Language en