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Multi-objective optimization for silicon wafer slicing using wire-EDM process

DSpace at IIT Bombay

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Title Multi-objective optimization for silicon wafer slicing using wire-EDM process
 
Creator DONGRE, G
ZAWARE, S
DABADE, U
JOSHI, SS
 
Subject HIGH-EFFICIENCY
CUT EDM
INGOTS
Wire-EDM
RSM
Kerf loss
Slicing speed
Surface roughness
 
Description The existing silicon ingot slicing methods adopt contact forces in slicing that could easily cause higher kerf loss and a larger variation in the thickness of the sliced wafers. Wire-EDM is a potential process for slicing of silicon ingots into wafers. This work therefore demonstrates capability of wire-EDM in silicon wafer slicing through a RSM based experimentation involving use of molybdenum wires of 40-120 mu m in diameter. During the experiments wafers of various height ranging from 50 to 150 mm were fabricated and capability of the process was assessed in minimizing the kerf width. It was evident that the kerf width reduces from 250 mu m to 50 mu m, when sliced by a 40 mu m diameter wire, which amounts to a reduction in kerf loss by 300%. The slicing speed on the other hand could be increased by 40-50% to 2.5 mm/min over the conventional abrasive slicing. A multi-objective optimization methodology adopted gives parametric conditions that give minimum kerf width at the highest slicing speed and the lowest surface roughness. (C) 2015 Elsevier Ltd. All rights reserved.
 
Publisher ELSEVIER SCI LTD
 
Date 2016-01-15T04:45:57Z
2016-01-15T04:45:57Z
2015
 
Type Article
 
Identifier MATERIALS SCIENCE IN SEMICONDUCTOR PROCESSING, 39,793-806
1369-8001
1873-4081
http://dx.doi.org/10.1016/j.mssp.2015.06.050
http://dspace.library.iitb.ac.in/jspui/handle/100/17792
 
Language en