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Part I: Physical Insights Into the Two-Stage Breakdown Characteristics of STI-Type Drain-Extended pMOS Device

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Title Part I: Physical Insights Into the Two-Stage Breakdown Characteristics of STI-Type Drain-Extended pMOS Device
 
Creator TAILOR, KH
SHRIVASTAVA, M
GOSSNER, H
BAGHINI, MS
RAO, VR
 
Subject Avalanche breakdown
drain-extended MOSFET (DeMOS)
input-output (I/O)
Kirk effect
parasitic bipolar triggering
safe operating area (SOA)
shallow-trench isolation (STI)
two-stage breakdown
 
Description In this paper, we study breakdown characteristics in shallow-trench isolation (STI)-type drain-extended MOSFETs (DeMOS) fabricated using a low-power 65-nm triple-well CMOS process with a thin gate oxide. Experimental data of p-type STI-DeMOS device showed distinct two-stage behavior in breakdown characteristics in both OFF-and ON-states, unlike the n-type device, causing a reduction in the breakdown voltage and safe operating area. The first-stage breakdown occurs due to punchthrough in the vertical structure formed by p-well, deep n-well, and p-substrate, whereas the second-stage breakdown occurs due to avalanche breakdown of lateral n-well/p-well junction. The breakdown characteristics are also compared with the STI-DeNMOS device structure. Using the experimental results and advanced TCAD simulations, a complete understanding of breakdown mechanisms is provided in this paper for STI-DeMOS devices in advanced CMOS processes.
 
Publisher IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
 
Date 2016-01-15T09:12:07Z
2016-01-15T09:12:07Z
2015
 
Type Article
 
Identifier IEEE TRANSACTIONS ON ELECTRON DEVICES, 62(12)4097-4104
0018-9383
1557-9646
http://dx.doi.org/10.1109/TED.2015.2481899
http://dspace.library.iitb.ac.in/jspui/handle/100/18244
 
Language en