ICAR Research Data Repository for Knowledge Management
VLSI design of low power digital FIR filter using PSPICE and VLSI design of high speed digital FIR filter using VERILOG HDL
Shodhganga@INFLIBNET
View Archive Info| Field | Value | |
| Title |
VLSI design of low power digital FIR filter using PSPICE and VLSI design of high speed digital FIR filter using VERILOG HDL
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| Contributor |
Malarvizhi, S
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| Subject |
Electronics and Communication
VLSI PSPICE VERILOG HDL |
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| Description |
Included
References included |
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| Date |
2013-01-18T11:14:44Z
2013-01-18T11:14:44Z 2013-01-18 n.d. November, 2008 2008 |
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| Type |
Ph.D.
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| Identifier |
http://hdl.handle.net/10603/6521
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| Language |
English US
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| Relation |
No. of references 9
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| Rights |
university
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| Format |
--
-- None |
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| Coverage |
Electronics and Communication
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| Publisher |
Kattankulathur
SRM University Department of Electronics and Communication Engineering |
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| Source |
INFLIBNET
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