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Application Of Alpha Power Law Models To The PLL Design Methodology Using Behavioral Models

Electronic Theses of Indian Institute of Science

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Field Value
 
Title Application Of Alpha Power Law Models To The PLL Design Methodology Using Behavioral Models
 
Creator Balssubramanian, Suresh
 
Subject Computer Aided Design
Integrated Circuits
Phased Locked Loop
Phased Locked Loop Design - Behavioral Models
PLL Design
Digital Signal Processing (DSP)
Application Specific Integrated Circuits (ASIC)
Phase Frequency Detector (PFD)
Voltage Controlled Oscillators (VCO)
Electronic Engineering
 
Contributor Jamadagni, H S
 
Date 2011-04-13T03:59:32Z
2011-04-13T03:59:32Z
2011-04-13
2004-04
 
Type Thesis
 
Identifier http://hdl.handle.net/2005/1127
http://etd.ncsi.iisc.ernet.in/abstracts/1477/G19577-Abs.pdf
 
Language en_US
 
Relation G19577