Record Details

Statistical Design For Yield And Variability Optimization Of Analog Integrated Circuits

Electronic Theses of Indian Institute of Science

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Field Value
 
Title Statistical Design For Yield And Variability Optimization Of Analog Integrated Circuits
 
Creator Nalluri, Suresh Babu
 
Subject Integrated Circuits - Design and Construction
Analog Integrated Circuit Design
Statistical MOS Model (SMOS)
Response Surface Methodology (RSM)
Statistical Simulation
Electronic Engineering
 
Contributor Shiva Prasad, A P
 
Date 2011-05-13T10:21:22Z
2011-05-13T10:21:22Z
2011-05-13
2004-12
 
Type Thesis
 
Identifier http://etd.iisc.ernet.in/handle/2005/1198
http://etd.ncsi.iisc.ernet.in/abstracts/1558/G18903-Abs.pdf
 
Language en_US
 
Relation G18903