Programmable delay circuit for sparker signal analysis
DRS at CSIR-National Institute of Oceanography
View Archive InfoField | Value | |
Title |
Programmable delay circuit for sparker signal analysis
|
|
Creator |
Pathak, D.
|
|
Description |
The sparker echo signal had been recorded along with the EPC recorder trigger on audio cassettes in a dual channel analog recorder. The sparker signal in the analog form had to be digitised for further signal processing techniques to be performed on it to classify the seafloor sediment properties. A specific purpose oriented programmable delay circuit was developed to generate the necessary delay so that the A/D conversion could start just before the arrival of the echo from the water bottom interface
|
|
Date |
2009-05-08T11:33:35Z
2009-05-08T11:33:35Z 1992 |
|
Type |
Conference Article
|
|
Identifier |
Proceedings of the National Symposium on Ocean Electronics, 18-20 December 1991, SYMPOL-91, 53-56p.
http://drs.nio.org/drs/handle/2264/3008 |
|
Language |
en
|
|
Rights |
Copyright [1992]. All efforts have been made to respect the copyright to the best of our knowledge. Inadvertent omissions, if brought to our notice, stand for correction and withdrawal of document from this repository.
|
|
Publisher |
CUSAT, Kochi
|
|