<strong>Realization of Square-Root Domain integrators with large time-constant</strong>
Online Publishing @ NISCAIR
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Title Statement |
<strong>Realization of Square-Root Domain integrators with large time-constant</strong> |
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Added Entry - Uncontrolled Name |
Khanday, Farooq A.; University of Kashmir, Department of Electronics and Instrumentation Technology, Srinagar, 190 006, INDIA Psychalinos, Costas ; Electronics Laboratory, Physics Department, University of Patras, GR-26504 |
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Uncontrolled Index Term |
Analog integrated circuits; Low-voltage analog circuits; Companding filters; Capacitor multipliers |
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Summary, etc. |
A technique for performing capacitor scaling in Square-Root Domain (SRD) filters is introduced in this paper. This has been achieved through an appropriate modification of the bias in the corresponding SRD integrator blocks. The validity of the proposed scheme has been verified through simulation results, where the most important performance factors have been compared with those obtained through the conventional SRD integrator scheme. |
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Publication, Distribution, Etc. |
Indian Journal of Pure & Applied Physics (IJPAP) 2016-05-20 09:07:56 |
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Electronic Location and Access |
binary/octet-stream http://op.niscair.res.in/index.php/IJPAP/article/view/8018 |
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Data Source Entry |
Indian Journal of Pure & Applied Physics (IJPAP); ##issue.vol## 54, ##issue.no## 5 (2016): Indian Journal of Pure & Applied Physics |
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Language Note |
en |
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Terms Governing Use and Reproduction Note |
Except where otherwise noted, the Articles on this site are licensed under Creative Commons License: CC Attribution-Noncommercial-No Derivative Works 2.5 India © 2015. The Council of Scientific & Industrial Research, New Delhi. |
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