Design and Performance Evaluation of Sub-Systems of Grid-Connected Inverters
Electronic Theses of Indian Institute of Science
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Title |
Design and Performance Evaluation of Sub-Systems of Grid-Connected Inverters
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Creator |
Karuppaswamy, Arun B
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Subject |
Grid Connected Inverters
Distributed Generation Power Quality LCL Filters Thermal Performance Evaluation LCL Filter Damping Design Grid Simulator Control Performance Evaluation LCL Filter Design LCL Filter Design Grid-connected Systems Grid-Connected Inverters Electrical Engineering |
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Description |
Grid-connected inverters have wide application in the field of distributed generation and power quality. As the power level demanded by these applications increase, the design and performance evaluation of these converters become important. In the present work, a 50 kVA three-phase back-to-back connected inverter with output LCL filter is built to study design and performance evaluation aspects of grid-connected inverters. The first part of the work explores the split-capacitor resistive-inductive (SC-RL) passive damping scheme for the output LCL filter of a three-phase grid-connected inverter. The low losses in the SC-RL scheme makes it suitable for high power applications. The SCRL damped LCL filter is modelled using state space approach. Using this model, the power loss and damping are analysed. A method for component selection that minimizes the power loss in the damping resistors while keeping the system well damped is proposed. Analytical results show the losses to be in the range of 0.05-0.1% and the quality factor to be in the range of 2.0-2.5. These results are validated experimentally. In the second part of the work, a test method to evaluate the thermal performance of the semi-conductor devices of a three-phase grid-connected inverter is proposed. The method eliminates the need for high power sources, loads or any additional power converters for circulation of power. Only energy corresponding to the losses is consumed. The capability of the method to evaluate the thermal performance of the DC bus capacitors and the output filter components is also explored. The method can be used with different inverter configurations -three-wire or four-wire and for different PWM techniques. The method has been experimentally validated at a power level of 24kVA. In the third part of the work, the back-to-back connected inverter is programmed as a hardware grid simulator. The hardware grid simulator emulates the real-time grid and helps create grid disturbances often observed at the point of common coupling in an ac low voltage grid. A novel disturbance generation algorithm has been developed, analysed and implemented in digital controller using finite state machine model for control of the grid simulator. A wide range of disturbance conditions can be created using the developed algorithm. Experimental tests have been done on a linear purely resistive load, a non-linear diode-bridge load and a current-controlled inverter load to validate the programmed features of the grid simulator. |
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Contributor |
John, Vinod
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Date |
2018-01-18T08:23:10Z
2018-01-18T08:23:10Z 2018-01-18 2014 |
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Type |
Thesis
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Identifier |
http://hdl.handle.net/2005/3024
http://etd.ncsi.iisc.ernet.in/abstracts/3887/G26769-Abs.pdf |
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Language |
en_US
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Relation |
G26769
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